EDA DRC Skill
Design validation, rule checking, and pre-manufacturing review.
Auto-Activation Triggers
This skill activates when:
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User asks to "check design", "validate", "run DRC"
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User asks about design errors or warnings
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User mentions manufacturing readiness
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Project is approaching completion
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User asks "is this ready for fabrication?"
Context Requirements
Requires:
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hardware/*.kicad_sch
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Schematic files
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hardware/*.kicad_pcb
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PCB layout
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docs/design-constraints.json
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Project constraints
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docs/component-selections.md
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Selected components
Produces:
- docs/validation-report.md
- Comprehensive validation report
Validation Scopes
/eda-check schematic
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Run ERC (Electrical Rules Check)
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Verify power connections
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Check decoupling capacitors
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Validate against datasheet requirements
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Check component values
/eda-check pcb
-
Run DRC (Design Rules Check)
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Verify placement guidelines
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Check routing rules
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Validate copper pours
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Review silkscreen
/eda-check components
-
Verify stock availability on LCSC
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Check current pricing
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Identify lifecycle issues
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Suggest alternatives if needed
/eda-check manufacturing
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Generate and review Gerbers
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Verify BOM completeness
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Check position file accuracy
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Validate against manufacturer specs
/eda-check full
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Run all above checks
-
Comprehensive pre-manufacturing validation
Workflow
- Load Context
@docs/design-constraints.json @docs/component-selections.md @docs/schematic-status.md @docs/pcb-status.md
- Run Automated Checks
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Execute DRC/ERC via KiCad MCP
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Capture all violations and warnings
- Manual Review Checklist
Use reference documents to verify:
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Common issues are addressed
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Manufacturer constraints are met
-
Design guidelines followed
- Component Verification
For each selected component:
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Check LCSC stock status
-
Verify pricing
-
Check for lifecycle warnings
- Generate Report
Create comprehensive validation report documenting:
-
Pass/fail status for each check
-
List of issues found
-
Recommended actions
-
Sign-off status
Output Format
validation-report.md
Validation Report
Project: [name] Generated: [timestamp] Scope: [schematic|pcb|components|manufacturing|full]
Summary
| Check | Status | Issues |
|---|---|---|
| ERC | PASS/FAIL | X errors, Y warnings |
| DRC | PASS/FAIL | X errors, Y warnings |
| Components | PASS/FAIL | X issues |
| Manufacturing | PASS/FAIL | X issues |
| Overall | PASS/FAIL |
Critical Issues
Items that MUST be fixed before manufacturing:
- [Issue description] - [Location] - [Fix]
- ...
Warnings
Items that SHOULD be reviewed:
- [Warning description] - [Location] - [Recommendation]
- ...
Notes
Items for information only:
- [Note]
- ...
Detailed Results
Schematic (ERC)
Status: PASS/FAIL
Errors:
- [Error type]: [Details]
Warnings:
- [Warning type]: [Details]
Checks Passed:
- All power pins connected
- All ICs have decoupling
- No unconnected pins (except intentional NC)
- Net names consistent
PCB (DRC)
Status: PASS/FAIL
Errors:
- [Error type]: [Details]
Warnings:
- [Warning type]: [Details]
Checks Passed:
- Trace width meets minimum
- Clearances meet minimum
- Via drill meets minimum
- Silkscreen not on pads
Components
| Component | LCSC | Stock | Price | Status |
|---|---|---|---|---|
| [name] | C#### | #### | $X.XX | OK/LOW/OOS |
Issues:
Manufacturing
Target: [JLCPCB/PCBWay/etc.]
Checks:
- Board size within limits
- Layer count supported
- Minimum features met
- BOM complete
- Position file accurate
Action Items
Before Manufacturing
- [Action required]
- [Action required]
Recommendations
- [Optional improvement]
Sign-off
- Schematic review complete
- PCB review complete
- Components verified
- Ready for manufacturing
Reviewed by: [name/date]
Guidelines
-
Run DRC frequently during layout, not just at the end
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Address all errors before manufacturing
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Document intentional rule violations
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Verify component availability before finalizing design
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Keep validation report updated as issues are fixed
Reference Documents
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reference/COMMON-ISSUES.md
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Frequent problems and solutions
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reference/MANUFACTURER-SPECS.md
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Manufacturer capabilities
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reference/VALIDATION-CHECKLIST.md
-
Pre-manufacturing checklist
Next Steps
After validation passes:
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Run /eda-export [format] to generate manufacturing files
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Update design-constraints.json stage to "complete"